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BU Rocket Propulsion Group team with the rocket
THE BURPG TEAM ON A COLD FLOW TEST SITE
LAYER STACK · EXPAND TO INSPECT
Overview

A four-layer telemetry board, 1 of a 3 part system for the Boston University Rocket Propulsion Group's next rocket flight computer with RF ground communication, ethernet, IMU, altimeter, GPS, flash storage, and CAN functionality.

My Role
  • Owned schematic capture for the entire board: 9 sheets covering power, RF, Ethernet PHY, GPS, CAN, and flash. Re-used circuits proven on the flight computer board and designed new ones in areas that needed improvement.
  • Before starting PCB design, I led a formal design review of the schematic to validate the approach.
  • Led PCB layout across a team of 3 new BURPG members: split the board by module, set placement/routing constraints, personally laid out power, USB, flash, and a large part of the Ethernet PHY.
Tools & Tech
Altium Designer Schematic Capture Multi-Layer PCB Layout Power Design Buck Circuit Protection Ethernet PHY LDO RF Layout SPI CAN I²C Component Selection & BOM UART DRC Team Management
1 · BOARD OVERVIEW

Telemetry Board System Role

System block diagram: flight computer, daughter board, GSE, and camera board interconnects

The flight computer for the rocket was designed to have 3 boards in total. It was decided by the team that the first, main flight computer board would have the minimum possible functionality for the rocket to fly in any capacity, while the daughter board or the "telemetry board", would accomplish the following goals:

  • RF Communication with Ground Support Electronics
  • Power and Control Camera
  • House Backup Altimeter and IMU
  • House GPS Module
  • Critical communications with flight computer board via CAN
  • Higher speeds + larger data transfers with flight computer board via Ethernet
2 · IC OVERVIEW

Board ICs and why they were chosen

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FUNCTIONPARTNOTES
MCUSTM32F407VGIn the STM32 family and compatible with BURPG's custom operating system built using FreeRTOS, but cheaper than MCU on main flight computer board, since less peripherals are required. 
IMULSM6DSOXTRCopied from previous designs. 6-axis, fast raw data. 
IMU Breakout
BNO0559-axis, gives absolute orientation in quaternions but updates slower and readings get sketchy under high vibration. Also serves as a known working backup circuit.
Altimeter BreakoutBMP388Copied from previous designs. High precision and speed on lower altitudes. Also serves as a known working backup circuit.
AltimeterMS5607Copied from previous designs. Backup, less precise and slower but works at all heights. 
GPSCD-PA1616SGPS module most similar to previous design (for easier software integration). Designed by junior team member overseen by me. 
PHYLAN8720Needs new code, but has RMII, is faster, has better application notes than previous PHY.  RJ45 connectors with integrated magnetics used, easier for testing but plan to switch to M12 connectors with separate magnetics later on. 
PHY CrystalABM8-25.000MHZ-B2-T325 MHz reference for the LAN8720 PHY, chosen over 50 MHz for lower EMI.
CANTCAN332DCNRCopied from previous designs. 
Flash + SD Card SlotSST25VF016 + 502774-0891Used and tested on main flight computer board, design copied
RF ModuleLoRa126XF30Same as new 433 MHz module on ground support electronics. 3–6.5 V operating range
CameraRunCam Split 4 V2Chosen by mechanical team since it includes SD and recording modules, reducing complexity. UART Communication, 5-20V
SCHEMATIC SHEETS · SCROLL → · CLICK TO ENLARGE
TopSheet.SchDoc — module hierarchy
TopSheet.SchDoc — module hierarchy
STM32.SchDoc — MCU, IMU, altimeter
STM32.SchDoc — MCU, IMU, altimeter
BoardIOModule.SchDoc — connectors, USB, JTAG
BoardIOModule.SchDoc — connectors, USB, JTAG
GPS.SchDoc — CD-PA1616S
GPS.SchDoc — CD-PA1616S
LAN8720phymodule.SchDoc — Ethernet PHY
LAN8720phymodule.SchDoc — Ethernet PHY
CAN_Module.SchDoc — TCAN332
CAN_Module.SchDoc — TCAN332
FlashMemory.SchDoc — SST25 + SD card
FlashMemory.SchDoc — SST25 + SD card
RF.SchDoc — LoRa126XF30, 433 MHz
RF.SchDoc — LoRa126XF30, 433 MHz
3 · POWER OVERVIEW

Power Design

Power comes from XT30 connectors from the flight computer at 24V, and is stepped down by a buck converter to ~6V to power RF and camera modules, and stepped down again by an LDO to 3.3V to power the rest of the ICs. A main, already tested eFuse configuration on the 24V line serves as an extreme backup, protecting upstream flight computer. Tighter current limits are set by the 6V current limiter, and the design also features load switches to control power to camera and RF. 

3.1 · POWER RAILS

24V to 6V Buck Converter

24-6V buck regulator, TPS54331DR

Buck converter chosen for efficiency at a large voltage step-down, powers RF and camera modules. Copied from flight computer 24V to 5V buck, output changed by changing R5 and R6:

VREF × (R5 / R6 + 1) = VOUT
0.8V × (10.2k/1.6k + 1) = 5.9V

6V to 3V LDO

3.3V regulator, LM1084IS-3.3RG

Copied from flight computer 5V to 3.3V converter, nothing changed since output is static at 3.3 V, and design is still within maximum |Vout-Vin| = 27V and minimum |Vout - Vin| = 1.5V. 

3.2 · PROTECTION

24V Rail Protection

24V rail protection, TPS259830ONRGER eFuse with SMBJ26A TVS, fuse, and external FET

Copied from previous designs, protects upstream system from overcurrent, and protects entire system from overheating and short-circuits.

6V Rail Protection

6V rail protection, TPS2553DBVR with SM6T7V5A TVS diode

7V maximum input for TPS2553, so D10 has 6.8V reverse breakdown voltage. Current limit is set to ~1.7A, slightly above approximate current draw of system. 

3.3 · MONITORING

Voltage/Temp Monitoring

Voltage monitoring op-amp buffers on 24V and 6V, plus 47k NTC thermistor
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EXPECTED
VM24V = 2.38VVM6V = 1.875VTemp1 = 0.579V (at 25C)

Voltage dividers needed for output voltage values to fit within 3V analog input limit on STM32. Expected output calculated based on input voltage and corresponding dividers.

3.4 · POWER ISOLATION

Load Switches

Load switch for camera, TPS27081ADDCR
Load switch for RF, TPS27081ADDCR

Load switches for camera and RF modules to conserve battery power and subsystem restart functionality, both off by default, turned on by pulling EN signal high. 1uF capacitor on output slows voltage rise, prevents extreme inrush current. 

6 · DESIGNED FOR BRINGUP

Debugging & Backups

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DEBUG FEATUREWHAT IT BUYS
JTAG HeaderFlashing, breakpoints, and variable inspection. 
USB ConnectorPowers the MCU with no separate supply and allows debugging via serial monitor, an incredibly helpful feature that the flight computer did not have. Thank god we have it now there's only so many variables you can inspect.
RMII Test HeaderPHY signal test access during bringup. 
ENC28J60 BreakoutStand-Alone Ethernet Controller with SPI Interface, backup if onboard PHY does not work. 
PHY Config ResistorsEvery LAN8720 mode strap layout has a backup 0 ohm unpopulated resistor, so that configurations can be more easily changed and fly-wired without re-ordering. 
GPS Breakout HeaderCD-PA1616S on a breakout, so if circuit fails, a known working breakout board can be attached to the board with the same module. 
IMU / Altimeter BreakoutsBesides previously mentioned benefits, ensure there is at least 1 IMU and altimeter of some kind functioning onboard. 
7 · PCB DESIGN

PCB Layout, Team Management, and What I Learned. 

3D render of the Argo daughter board, rev 0


Overview

I owned the schematic through design review, then ran layout with a team of 3. First, I made a draft of where the components would be placed on the board according to size, and then assigned junior team members easier modules (Altimeters, IMUs, GPS, RF) and oversaw their layout. I did this in two stages: the first check was when they physically placed the components on the board, and the next check was after they had routed the traces. After their components were done, some of the members also helped me with connecting all of the ICs to the MCU, which I saved for last in case any last minute placement changes needed to be made.  I did the power layout myself, since it was the most complex and simultaneously mission critical, and ended up doing the second half of the PHY, as well as the flash and CAN modules. The schematics and PCB for this project were all pushed to a communal git repository, and a version control schedule had to be implemented for the PCB work time. 


Setbacks

The schematic process for the board was relatively straightforward, since I had discussed clear requirements with the avionics team, had a person on the electrical team to mentor me that I had worked with prior, and had already had experience with schematics (and layout) for the first flight computer board, which had a similar structure. However, managing a team unraveled a whole new set of challenges. 

First off, I ran into an issue with the Altium software itself. Many of the component footprints were acquired from previous designs, which I had locally saved onto my computer, but did not appear for other members when they pulled from Phabricator and opened the PCB layout. This hindered the initial start date, and I had to quickly come up with a fix. Instead of relocating components batch by batch from all separate projects, I found that if I just dragged all of the components onto the PCB board myself and pushed the project, the other team members were able to see them. Therefore, I created a separate section of the board to drag unplaced components, from which my team sourced them.

Secondly, the junior engineers that volunteered to help me with the project were all different skill levels, and this is something I did not realize at the start of the project but should have evaluated. This meant that the same amount of instructions could work for one team member, while the same amount would not work for the other members and would cost much more time for both me and them due to numerous revisions. It also occurred to me that even though I would say something to one member in the presence of the others, it did not mean that the rest of the members would also take that advice, and therefore there were a lot of instructions that needed to be repeated. 

Next time, I would make a document with all of the basic PCB guidelines that the entire team could refer to, and go through it with each one individually, and even sit down with them while they do some very basic layout, to make sure they understand the material and can actively implement it, which would save a lot of time. 

Enlarged schematic
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